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One stop electronic component supply Original FMN1ET1TCB-25IH Stacked Multi-Chip Product 1.8V NAND Flash Memory and MobileDDR2
FMN1ET1TCB-25IH-Multiplexed, double data rate, command/addressinputs;
commands entered on every CK edge
- Bidirectional/differential data strobe per byte of
data(DQS/DQS#).
Product Features
1. MCP Features • Package Type :
- 121-ball FBGA, 8.0x8.0mm2, 0.86T, 0.5mm Ball Pitch
- 162-ball FBGA, 11.5x13.0mm2, 1.0T, 0.5mm Ball Pitch
- 162-ball FBGA, 8.0x10.5mm2, 1.0T, 0.5mm Ball Pitch
- Lead & Halogen Free
• Operating Temperature Range
- Industrial Part : -40°C ~ 85°C
NAND
• x8/x16 I/O BUS
— NAND Interface
— ADDRESS / DATA Multiplexing
• SUPPLY VOLTAGE
— VCC = 1.8 Volt core supply voltage
for Program, Erase and Read operations
• MEMORY CELL ARRAY
— x8 : (2K + 64) bytes x 64 pages x 1024 blocks
— x16: (1K + 32) words x 64 pages x 1024 blocks
• PAGE READ / PROGRAM
— Synchronous Page Read Operation
— Random access : 25us (Max)
— Serial access : 45ns (1.8V)
— Page program time : 200us (Typ)
• ELECTRONIC SIGNATURE
— Manufacturer Code
— Device Code
• DATA RETENTION
— Cycling: 100K Program / Erase cycles
— Data retention: 10 Years(4bit/512byte ECC)
— Block zero is a valid block and will be valid for at
least 1K program-erase cycles with ECC
DRAM
- VDD2 = 1.14–1.30V
- VDDCA/VDDQ = 1.14–1.30V
- VDD1 = 1.70–1.95V
- Interface : HSUL_12
- Data width : x16
- Clock frequency : 400 MHz
- Four-bit pre-fetch DDR architecture
- Eight internal banks for concurrent operation
- Multiplexed, double data rate, command/addressinputs;
commands entered on every CK edge
- Bidirectional/differential data strobe per byte of
data(DQS/DQS#).
- DM masks write date at the both rising and falling edge
of the data strobe
- Programmable READ and WRITE latencies (RL/WL)
- Programmable burst lengths: 4, 8, or 16
- Auto refresh and self refresh supported
- All bank auto refresh and per bank auto refresh supported
- Clock stop capability
• Low Power Features
- Low voltage power supply.
- Auto TCSR (Temperature Compensated Self Refresh).
- PASR (Partial Array Self Refresh) power-saving mode.
- DPD (Deep Power Down) Mode.
- DS (Driver Strength) Control.
Specifications
Attribute | Attribute value |
ANSM-Part# | ANSM-FMN1ET1TCB-25IH |
Type: | LPDDR2 |
Manufactor | Dosilicon |
DC | Standard |
Describe | NEW |
Supplier Device Packaging | FBGA162 |
Package | TRAY |
Density | 1Gb |
Voltage (V) | 1.8 |
Speed (MHz/CLK) | 400MHz |
Temp.Range | -40℃~85℃ |
Actual product photos
Product Data Book:
For more product information, please download the PDF
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