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One stop electronic component supply Original FMN4ET2TCB-25IH Stacked Multi-Chip Product 1.8V NAND Flash Memory and Mobile DDR2

Manufacturer Product Number
FMN4ET2TCB-25IH
Description

FMN4ET2TCB-25IH-Multiplexed, double data rate, command/address inputs;

 commands entered on every CK edge

- Bidirectional/differential data strobe per byte of 

 data(DQS/DQS#).

Package Condition
Tray

Product Features

1. MCP Features

• Operating Temperature Range

 - Industrial Part : - 40°C ~ 85°C

• Package Type :

 - 162-ball FBGA, 11.5x13.0mm2, 1.0T, 0.5mm Ball Pitch

 - 162-ball FBGA, 8.0x10.5mm2, 1.0T, 0.5mm Ball Pitch

 - Lead & Halogen Free

 NAND 

• Architecture (4G bits)

 - Input / Output Bus Width: 8-bits / 16-bits

- Page size

 X 8 : (2K+64spare) bytes (@1.8V)

 X16 : (1K+32spare) words (@1.8V)

 – Block size 

 X8 : (128K+4K) bytes

 X16 : (64K+2K) words

 – Plane Size: 2048 Blocks

 – Device Size: 2 Planes per Device

• Page Read / Program

 - Random Read Time (tR): 25 μs (Max) 

 - Sequential Access Time: 45 ns (Min)

 - Page Program: 200 μs (Typ)

• Block Erase / Multi-plane Erase

 - Block Erase time: 2ms (Typ) 

• Security

 - OTP area

 - Serial Number (unique ID)

• Supply Voltage

 - 1.8V device: VCC = 1.7V ~ 1.95V

• Reliability

 - 100,000 Program / Erase cycles 

 (with 4-bit ECC per 528 bytes)

 - 10 Year Data retention 

 DRAM 

 - VDD2 = 1.14–1.30V

 - VDDCA/VDDQ = 1.14–1.30V

 - VDD1 = 1.70–1.95V

 - Interface : HSUL_12

 - Data width : x16, x32 

- Clock frequency : 400Mhz

- Four-bit pre-fetch DDR architecture

- Eight internal banks for concurrent operation

- Multiplexed, double data rate, command/address inputs;

 commands entered on every CK edge

- Bidirectional/differential data strobe per byte of 

 data(DQS/DQS#).

- DM masks write date at the both rising and falling edge 

 of the data strobe

- Programmable READ and WRITE latencies (RL/WL)

- Programmable burst lengths: 4, 8, or 16

- Auto refresh and self refresh supported

- All bank auto refresh and per bank auto refresh supported

- Clock stop capability

• Low Power Features

 - Low voltage power supply.

 - Auto TCSR (Temperature Compensated Self Refresh).

 - PASR (Partial Array Self Refresh) power-saving mode.

 - DPD (Deep Power Down) Mode.

 - DS (Driver Strength) Control.

  Specifications

Attribute Attribute value
ANSM-Part# ANSM-FMN4ET2TCB-25IH
Type: LPDDR2
Manufactor Dosilicon
DC Standard
Describe NEW
Supplier Device Packaging FBGA162
Package TRAY
Density 4Gb
Voltage (V) 1.8
Speed (MHz/CLK) 400MHz
Temp.Range -40℃~85℃

Actual product photos

FBGA162

Product Data Book:

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For more product information, please download the PDF

Payment&Transportation

详情8.1

Official Certificate&Certificate

详情页3.1

Multiple product supply

详情5.1

Company office environment

详情6.1

Warehouse Real Shot

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Standard packaging

详情9

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One stop electronic component supply Original FMN4ET2TCB-25IH Stacked Multi-Chip Product 1.8V NAND Flash Memory and Mobile DDR2

FMN4ET2TCB-25IH-Multiplexed, double data rate, command/address inputs;

 commands entered on every CK edge

- Bidirectional/differential data strobe per byte of 

 data(DQS/DQS#).

Write your review

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