Product Introduction

PFC232 is a processor with ADC, parallel processing, completely static, and MTP as the program storage basis. This processor has two processing units. It is based on the RISC architecture and has obtained a patent for Field Programmable Processor Array technology. The execution cycle of most instructions is one instruction cycle, and only a few indirectly addressed instructions require two instruction cycles.

The PFC232 is equipped with 2KW MTP program memory and 128 byte data memory for the operation of two FPP units.

PFC232 has a built-in 12 channel 12 bit resolution A/D converter, with one channel serving as an internal Bandgap reference voltage or 0.25 * VDD.

PFC232 provides a 16 bit hardware counter (Timer16), two 8-bit counters (Timer2, Timer3), and three 11 bit counters (PWMG0, PWMG1, PWMG2). Except for Timer16, all other counters can generate PWM waveforms.

PFC232 also provides an operational amplifier (OPA), hardware comparator, VDD/2 bias voltage generator to drive the LCD, and an 8 × 8 hardware multiplier to enhance hardware computing capabilities.

   Product Features

1.1. System characteristics

High EFT series

Especially suitable for AC power supply, resistive capacitive voltage reduction circuits, and those that require strong anti-interference ability,

Or products with high EFT safety testing requirements (± 4KV).

Operating temperature range: -40 ° C~85 ° C

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1.2. system function

2KW MTP program space for two FPP units (programmable 1000 times)

128 bytes of data space for two FPP units to use

A hardware 16 bit timer

Two 8-bit hardware PWM generators

Three 11 bit hardware PWM generators

Provide a hardware comparator

Provide an operational amplifier (OPA)

Provide 1T 8 × 8 hardware multiplier

14 IO pins with optional pull-up/pull-down resistors

Each IO pin has a system wake-up function

For each IO with wake-up function set, there are two selectable wake-up speeds: normal wake-up and fast wake-up

The internal Bandgap circuit provides a reference voltage of 1.2V

Maximum 12 channel 12 bit ADC, with one channel sourced from an internal bandtap reference voltage or 0.25 * VDD

Provide ADC reference high voltage options: external input, internal VDD, bandtap (1.2V), 4V, 3V, 2V

Clock mode: external crystal oscillator, internal high-frequency oscillator, internal low-frequency oscillator

Built in VDD/2 bias voltage generator, capable of supporting LCD screens with a maximum 5 × 9 dot matrix

8-segment LVR reset setting, from 1.8V to 4.5V

Four external interrupt input pins

1.3. CPU characteristics

Working mode: Two FPPATM processing units operating mode or a single processing unit operating mode

89 efficient instructions

The vast majority of instructions are single cycle (1T) instructions

Programmable stack pointer and stack depth

Data access supports both direct and indirect addressing modes, and the data storage can be used as an index pointer for indirect addressing mode

Register address space, data storage space, and MTP program space are independent of each other

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