Product Descriptions

The XC9536 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of eight 36V18 Function Blocks, providing 800 usable gates with propagation delays of 5 ns. See Figure 2 for the architecture overview.

Product Features

• 5 ns pin-to-pin logic delays on all pins

• fCNT to 100 MHz

• 36 macrocells with 800 usable gates

• Up to 34 user I/O pins

• 5V in-system programmable

- Endurance of 10,000 program/erase cycles

- Program/erase over full commercial voltage and temperature range

• Enhanced pin-locking architecture

• Flexible 36V18 Function Block

- 90 product terms drive any or all of 18 macrocells within Function Block

- Global and product term clocks, output enables,set and reset signals

• Extensive IEEE Std 1149.1 boundary-scan (JTAG) support

• Programmable power reduction mode in each macrocell

• Slew rate control on individual outputs

• User programmable ground pin capability

• Extended pattern security features for design protection

• High-drive 24 mA outputs

• 3.3V or 5V I/O capability

• Advanced CMOS 5V FastFLASH™ technology

• Supports parallel programming of more than one XC9500 concurrently

• Available in 44-pin PLCC, 44-pin VQFP, 48-pin CSP packages

Specifications

Actual product photos

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