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Hot-selling and scarce ISP1760BE Hi-Speed Universal Serial Bus host controller for embedded applications LQFP128 spot stock
ISP1760BE Hi-Speed Universal Serial Bus host controller for embedded applications LQFP128 spot stock
Product Descriptions
The ISP1760 is a Hi-Speed Universal Serial Bus (USB) Host Controller with a generic processor interface. It integrates one Enhanced Host Controller Interface (EHCI), one Transaction Translator (TT) and three transceivers. The Host Controller portion of the ISP1760 and the three transceivers comply to Universal Serial Bus Specification Rev. 2.0. The EHCI portion of the ISP1760 is adapted from Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0.
The integrated high-performance Hi-Speed USB transceivers enable the ISP1760 to handle all Hi-Speed USB transfer speed modes: high-speed (480 Mbit/s), full-speed(12 Mbit/s) and low-speed (1 .5 Mbit/s). The three downstream ports allow simultaneous connection of three devices at different speeds (high-speed, full-speed and low-speed).
The generic processor interface allows the ISP1760 to be connected to various processors as a memory-mapped resource. The ISP1760 is a slave host: it does not require‘bus-mastering’ capabilities of the host system bus. The interface is configurable, ensuring compatibility with a variety of processors. Data transfer can be performed on
16 bits or 32 bits, using Programmed Input/Output (PIO) or Direct Memory Access (DMA) with major control signals configurable as active LOW or active HIGH.
Product Features
■ The Host Controller portion of the ISP1760 complies with Universal Serial Bus Specification Rev. 2.0
■ The EHCI portion of the ISP1760 is adapted from Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0
■ Contains three integrated Hi-Speed transceivers that support the high-speed,full-speed and low-speed modes
■ Integrates a TT for Original USB (full-speed and low-speed) device support
■ Up to 64-kbyte internal memory (8 k x 64 bits) accessible through a generic processor interface; operation in multitasking environments is made possible by the implementation of virtual segmentation mechanism with bank switching on task request
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