Spot sales of HEF4076BP Quadruple D-type register with 3-state outputs DIP-16

Product Descriptions

The HEF4076B is a quadruple edge-triggered D-type flip-flop with four data inputs (D0 to D3), two active LOW data enable inputs (ED0 and ED1), a common clock input (CP), four 3-state outputs (O0 to O3), two active LOW output enable inputs (EO0 and EO1), and an overriding asynchronous master reset input (MR).

Information on D0 to D3 is stored in the four flip-flops on the LOW to HIGH transition of CP if both ED0 and ED1 are LOW. A HIGH on either ED0 or ED1 prevents the flip-flops from changing on the LOW to HIGH transition of CP, independent of the information on D0 to D3. When both EO0 and EO1 are LOW, the contents of the four flip-flops are available at O0 to O3. A HIGH on either EO0 or EO1 forces O0 to O3 into the high impedance OFF-state. A HIGH on MR resets all four flip-flops, independent of all other input conditions.

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