Free hotline:
+86 135 5637 6665
+852 2632 9637
Image shown is a representation only.
Exact specifications should be obtained from the product data sheet.
Hot-selling and scarce LMK04228NKDR Clock Jitter Cleaner With Dual-Loop PLLs 64-WFQFN spot stock
LMK04228NKDR Clock Jitter Cleaner With Dual-Loop PLLs 64-WFQFN spot stock
Product Descriptions
The LMK04228 device is the industry's highperformance clock conditioner with JEDECJESD204B support .
The 14 clock outputs from PLL2 can be configured todrive seven JESD204B converters or other logicdevices using device and SYSREF clocks . SYSREFcan be provided using both DC and AC coupling . Notlimited to JESD204B applications, each of the 14outputs can be individually configured as highperformance outputs for traditional clocking systems .
The high performance combined with features like theability to trade off between power or performance,dual VCOs, holdover, and per-output adjustableanalog and digital delay make the LMK04228 idealfor providing flexible high performance clocking trees .
Product Features
• JEDEC JESD204B Support
• Ultra-Low RMS Jitter
– 156 fs RMS Jitter (12 kHz to 20 MHz)
– 245 fs RMS Jitter (100 Hz to 20 MHz)
– –162.5 dBc/Hz Noise Floor at 245.76 MHz
• Up to 14 Differential Device Clocks from PLL2
– Up to 7 SYSREF Clocks
– Maximum Clock Output Frequency: 1.25 GHz
– LVPECL, LVDS Programmable Outputs From PLL2
• Buffered VCXO or Crystal Output From PLL1
– LVPECL, LVDS, 2xLVCMOS Programmable
• Dual Loop PLLatinum ™ PLL Architecture
• PLL1
– Up to 3 Redundant Input Clocks
– Automatic and Manual Switch-Over Modes
– Hitless Switching and LOS
– Integrated Low-Noise Crystal Oscillator Circuit
– Holdover Mode When Input Clocks are Lost
• PLL2
– Normalized [1 Hz] PLL Noise Floor of
–224 dBc/Hz
– Phase Detector Rate up to 155 MHz
– OSCin Frequency-Doubler
– Two Integrated Low-Noise VCOs
• 50% Duty Cycle Output Divides, 1 to 32 (Even and Odd)
• Precision Digital Delay
• 25-ps Step Analog Delay
• Multi-Mode: Dual PLL or Single PLL
• Industrial Temperature Range: –40°C to 85°C
• 3. 15-V to 3.45-V Operation
• Package: 64-Pin WQFN (9 .0 × 9.0 × 0.8 mm)
Product Applications
• Wireless Infrastructure
• Data Converter Clocking
• Networking, SONET/SDH, DSLAM
• Medical / Video / Military / Aerospace
• Test and Measurement
Product Specification
| Attribute | Attribute value |
| ANSM-Part# | ANSM-LMK04228NKDR |
| Category | Integrated Circuits (ICs) |
| Clock/Timing | |
| Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | - |
| Packaging | Tape & Reel (TR) |
| Part Status | Active |
| DigiKey Programmable | Not Verified |
| Type | Jitter Cleaner |
| PLL | Yes |
| Input | LVCMOS, LVDS, LVPECL |
| Output | LVCMOS, LVDS, LVPECL |
| Number of Circuits | 1 |
| Ratio - Input:Output | 3:15 |
| Differential - Input:Output | Yes/Yes |
| Frequency - Max | 3.08GHz |
| Divider/Multiplier | Yes/No |
| Voltage - Supply | 3.15V ~ 3.45V |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Mounting Type | Surface Mount |
| Package / Case | 64-WFQFN Exposed Pad |
| Supplier Device Package | 64-WQFN (9x9) |
| Base Product Number | LMK04228 |
Product Photos

For more product information, please download the PDF