Hot-selling and scarce CDCLVD110ARHBT Programmable Low-Voltage 1:10 LVDS Clock Driver 32VQFN spot stock

Product Descriptions

The CDCLVD110A clock driver distributes one pair ofdifferential  LVDS clock inputs (either CLK0 or CLK1)to 10 pairs of differential  clock outputs (Q0 to Q9)with minimum skew for  clock distribution .   TheCDCLVD110A is specifically designed to drive 50-Ωtransmission lines .

When the control  enable is high (EN = 1),  the 10differential  outputs are programmable in that  eachoutput   can be individually enabled or  disabled(3-stated) according to the first 10 bits loaded into theshift  register .  Once the shift  register is loaded, thelast  bit  selects either CLK0 or CLK1 as the clockinput .  However, when EN = 0, the outputs are notprogrammable and all outputs are enabled .

The CDCLVD110A has an improved start-up circuitthat minimizes enabling time in AC - and DC-coupledsystems .

The CDCLVD110A is characterized for  operationfrom –40°C to 85°C .

Product Features

•   Low-Output Skew <30 ps (Typical) for Clock Distribution Applications

•   Distributes One Differential Clock Input to 10 LVDS Differential Clock Outputs

•   VCC Range: 2.5 V ±5%

•   Typical Signaling Rate Capability of Up to 1.1 GHz

•   Configurable Register (SI/CK) Individually  Enables Disables Outputs, Selectable CLK0, CLK0 orCLK1, CLK1 Inputs

•   Full Rail-to-Rail Common-Mode Input Range

•   Receiver Input Threshold: ± 100 mV

•   Available in 32-Pin LQFP and VQFN Package

•   Fail-Safe I/O-Pins for VDD = 0 V (Power Down)

Product Applications

•   General-Purpose Industrial, Communication and Consumer Applications

Product Specifications

Product Photos

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