Hot-selling and scarce XC2S50E-6PQ208C Field Programmable Gate Array IC QFP spot stock

    Product Descriptions

Features include block RAM (to 288K bits), distributed RAM  (to 221,184 bits), 19 selectable I/O standards, and four  DLLs (Delay-Locked Loops). Fast, predictable interconnect  means that successive design iterations continue to meet  timing requirements.

The Spartan-IIE family is a superior alternative to  mask-programmed ASICs. The FPGA avoids the initial cost,  lengthy development cycles, and inherent risk of  conventional ASICs. Also, FPGA programmability permits  design upgrades in the field with no hardware replacement  necessary (impossible with ASICs).​

    Product Features

• Second generation ASIC replacement technology

- Densities as high as 15,552 logic cells with up to 600,000 system gates

- Streamlined features based on Virtex®-E FPGA architecture

- Unlimited in-system reprogrammability

- Very low cost

- Cost-effective 0.15 micron technology

• System level features

- SelectRAM™ hierarchical memory:

· 16 bits/LUT distributed RAM

· Configurable 4K-bit true dual-port block RAM

· Fast interfaces to external RAM

- Fully 3.3V PCI compliant to 64 bits at 66 MHz and CardBus compliant

- Low-power segmented routing architecture

- Dedicated carry logic for high-speed arithmetic

- Efficient multiplier support

- Cascade chain for wide-input functions

- Abundant registers/latches with enable, set, reset

- Four dedicated DLLs for advanced clock control

· Eliminate clock distribution delay

· Multiply, divide, or phase shift

- Four primary low-skew global clock distribution nets

- IEEE 1149.1 compatible boundary scan logic

    Product Specification

    Product Photos

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