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Hot-selling and scarce ISPPAC-POWR1220AT8-01TN100I Power Supply Support Circuit Adjustable QFP spot stock
ISPPAC-POWR1220AT8-01TN100I Power Supply Support Circuit Adjustable QFP spot stock
Product Descriptions
The Lattice Power Manager II ispPAC-POWR1220AT8 is a general-purpose power-supply monitor, sequence and margin controller, incorporating both in-system programmable logic and in-system programmable analog functions implemented in non-volatile E2 CMOS® technology. The ispPAC-POWR1220AT8 device provides 12 independent analog input channels to monitor up to 12 power supply test points. Each of these input channels offers a differential input to support remote ground sensing, and has two independently programmable comparators to support both high/low and in-bounds/ out-of-bounds (window-compare) monitor functions. Six general-purpose digital inputs are also provided for miscellaneous control functions.
The ispPAC-POWR1220AT8 provides 20 open-drain digital outputs that can be used for controlling DC-DC converters, low-drop-out regulators (LDOs) and optocouplers, as well as for supervisory and general-purpose logic interface functions. Four of these outputs (HVOUT1-HVOUT4) may be configured as high-voltage MOSFET drivers. In high-voltage mode these outputs can provide up to 12V for driving the gates of n-channel MOSFETs so that they can be used as high-side power switches controlling the supplies with a programmable ramp rate for both ramp up and ramp down.
Product Features
Monitor, Control, and Margin Multiple Power Supplies
• Simultaneously monitors up to 12 power supplies
• Provides up to 20 output control signals
• Provides up to eight analog outputs for margining/trimming power supply voltages
• Programmable digital and analog circuitry
Power Supply Margin and Trim Functions
• Trim and margin up to eight power supplies
• Dynamic voltage control through I2C
• Four hardware selectable voltage profiles
• Independent Digital Closed-Loop Trim function for each output
Embedded PLD for Sequence Control
• 48-macrocell CPLD implements both state machines and combinatorial logic functions
Embedded Programmable Timers
• Four independent timers
• 32µs to 2 second intervals for timing sequences
Analog Input Monitoring
• 12 independent analog monitor inputs
• Differential inputs for remote ground sense
• Two programmable threshold comparators per analog input
• Hardware window comparison
• 10-bit ADC for I2C monitoring
High-Voltage FET Drivers
• Power supply ramp up/down control
• Programmable current and voltage output
• Independently configurable for FET control or digital output
2-Wire (I2C/SMBus™ Compatible) Interface
• Comparator status monitor
• ADC readout
• Direct control of inputs and outputs
• Power sequence control
• Dynamic trimming/margining control
3.3V Operation, Wide Supply Range 2.8V to 3.96V
• In-system programmable through JTAG
• Industrial temperature range: -40°C to +85°C
• 100-pin TQFP package, lead-free option
Product Photos

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