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SN74LVT573DW 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SOP20 spot stock

Manufacturer Product Number
SN74LVT573DW
Description

SN74LVT573DW 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES

Package Condition
TaPe & Reel
Datasheet
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Product Descriptions

These octal latches are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The eight latches of the ’LVT573 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Product Features

 State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static Power Dissipation 

 Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC

 Support Unregulated Battery Operation Down to 2.7 V 

 Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

 ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) 

 Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 

 Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors 

 Support Live Insertion 

 Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Packages, and Ceramic (J) DIPs

Product Specification

Attribute Attribute value
ANSM-Part# ANSM-SN74LVT573DW
Category Integrated Circuits (ICs)
Logic
Latches
Mfr -
Series 74LVT
Packaging Tube
Part Status Active
Logic Type D-Type Transparent Latch
Circuit 8:8
Output Type Tri-State
Voltage - Supply 2.7V ~ 3.6V
Independent Circuits 1
Delay Time - Propagation 2.9ns
Current - Output High, Low 32mA, 64mA
Operating Temperature -40°C ~ 85°C
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295", 7.50mm Width)
Supplier Device Package 20-SOIC
Base Product Number 74LVT573

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Product Photos

SN74LVT573DW

For more product information, please download the PDF

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SN74LVT573DW 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SOP20 spot stock

SN74LVT573DW 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES

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