Hot-selling and scarce XC17S15ASO20C OTP Configuration PROM for FPGAs 150kb 20-SOIC spot stock

Product Descriptions

The XC17S00A family of PROMs provide an easy-to-use, cost-effective  method  for  storing  Spartan-II/Spartan-IIE device configuration bitstreams.

When  the  Spartan  device  is  in  Master  Serial  mode,  it generates  a  configuration  clock  that  drives  the  Spartan PROM.A short access time after the rising clock edge,data appears on the PROM DATA output pin that is connected to the Spartan device D IN pin. The Spartan device generates the  appropriate  number of  clock  pulses to complete the

configuration.  Once  configured,  it  disables  the  PROM. When a Spartan device is in Slave Serial mode, the PROM and  the  Spartan  device  must  both  be  clocked  by  an incoming signal.

    ​For device programming, either the Xilinx Alliance or the Spartan  device  design  file  into  a  standard  HEX  format which  is  then  transferred  to  most  commercial  PROM programmers.

Product Features

•     Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Spartan-II/Spartan-IIE FPGA devices

•     Simple interface to the Spartan device

•     Programmable reset polarity (active High or active Low)    

•     Low-power CMOS floating gate process

•     3.3V PROM

•     Available in compact plastic 8-pin DIP, 8-pin VOIC,20-pin SOIC, or 44-pin VQFP packages.

•     Programming support by leading programmer manufacturers.

•     Design support using the Xilinx Alliance and Foundation series software packages.

•     Guaranteed 20-year life data retention

Product Specifications

Product Photos

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WhenCE is HIGH (deselected),the device assumes a standby mode at which the power dissipation can be reduced down to250 µW (typical) with CMOS input levels.