Hot-selling and scarce GAL6002B-15LP High Performance E2CMOS FPLA Generic Array Logic IC DIP24 spot stock

Product Descriptions

Having an FPLA architecture, the GAL6002 provides superior flexibility in state-machine design. The GAL6002 offers the highest degree of functional integration, flexibility, and speed currently available in a 24-pin, 300-mil package. E2 CMOS technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently

The GAL6002 has 10 programmable Output Logic Macrocells (OLMC) and 8 programmable Buried Logic Macrocells (BLMC). In addition, there are 10 Input Logic Macrocells (ILMC) and 10 I/O Logic Macrocells (IOLMC). Two clock inputs are provided for independent control of the input and output macrocells.

Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacturing. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.

Product Features

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY

— 15ns Maximum Propagation Delay

— 75MHz Maximum Frequency

— 6.5ns Maximum Clock to Output Delay

— TTL Compatible 16mA Outputs

— UltraMOS® Advanced CMOS Technology

• ACTIVE PULL-UPS ON ALL PINS

• LOW POWER CMOS

— 90mA Typical Icc

• E2CELL TECHNOLOGY

— Reconfigurable Logic

— Reprogrammable Cells

— 100% Tested/100% Yields

— High Speed Electrical Erasure (<100ms)

— 20 Year Data Retention

• UNPRECEDENTED FUNCTIONAL DENSITY

— 78 x 64 x 36 FPLA Architecture

— 10 Output Logic Macrocells

— 8 Buried Logic Macrocells

— 20 Input and I/O Logic Macrocells

• HIGH-LEVEL DESIGN FLEXIBILITY

— Asynchronous or Synchronous Clocking

— Separate State Register and Input Clock Pins

— Functional Superset of Existing 24-pin PAL® and FPLA Devices

Product Applications

— Sequencers

— State Machine Control

— Multiple PLD Device Integration

Product Photos

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