Hot-selling and scarce ZL50111GAG 128 256 and 1024 Channel CESoP Processors BGA spot stock

Product Features

General

• Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks

• On chip timing & synchronization recovery across a packet network

• Grooming capability for Nx64 Kbps trunking

Circuit Emulation Services

• Complies with ITU-T recommendation Y.1413

• Complies with IETF PWE3 draft standards for CESoPSN and SAToP

• Complies with CESoP draft IAs for MEF and MFA

• Structured, synchronous CESoP with clock recovery

• Unstructured, asynchronous CESoP, with integral per stream clock recovery

TDM Interfaces

• Up to 32 T1/E1, 8 J2, 2 T3/E3 or 1 STS-1 ports

• H.110, H-MVIP, ST-BUS backplanes

• Up to 1024 bi-directional 64 Kbps channels

• Direct connection to LIUs, framers, backplanes

• Dual reference Stratum 3, 4 and 4E DPLL for synchronous operation

Network Interfaces

• Up to 3 x 100 Mbps MII Fast Ethernet or Dual Redundant 1000 Mbps GMII/TBI Ethernet Interfaces

System Interfaces

• Flexible 32 bit host CPU interface (Motorola PowerQUICC™ compatible)

• On-chip packet memory for self-contained operation, with buffer depths of over 16 ms

• Up to 8 Mbytes of off-chip packet memory, supporting buffer depths of over 128 ms

Product Applications

• Circuit Emulation Services over Packet Networks

• Leased Line support over packet networks

• Multi-Tenant Unit access concentration

• TDM over Cable

• Fibre To The Premises G/E-PON

• Layer 2 VPN services

• Customer-premise and Provider Edge Routers and Switches

• Packet switched backplane applications

Product Specification

Product Photos

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