Hot-selling and scarce ISPLSI2032A-80LJ44 In-System Programmable High Density PLD PLCC spot stock

Product Descriptions

The  2032 and 2032A are High Density Programmable Logic Devices.The devices contain 32 Registers,32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing  Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2032 and 2032A feature 5V insystem  programmability  and  in-system  diagnostic capabilities.  The  ispLSI  2032  and  2032A  offer  nonvolatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems. 

The basic unit of logic on these devices is the Generic Logic Block (GLB). The GLBs are labeled A0, A1 .. A7(Figure 1). There are a total of eight GLBs in the ispLSI2032 and 2032A devices. Each GLB is made up of four macrocells. Each GLB has 18 inputs, a programmable AND/OR/Exclusive OR array,and four outputs which can be configured to be either combinatorial or registered. Inputs to the GLB come from the GRP and dedicated inputs. All of the GLB outputs are brought back into the GRP so that they can be connected to the inputs of any GLB on the device.

Product Features

• ENHANCEMENTS

—  ispLSI 2032A is Fully Form and Function Compatible to the ispLSI 2032, with Identical Timing Specifcations and Packaging

—  ispLSI 2032A is Built on an Advanced 0.35 Micron  E2CMOS® Technology

• HIGH DENSITY PROGRAMMABLE LOGIC

—  1000 PLD Gates

— 32 I/O Pins, Two Dedicated Inputs

— 32 Registers

—  High Speed Global Interconnect

— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.

— Small Logic Block Size for Random Logic

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY

— fmax = 180 MHz Maximum Operating Frequency

— tpd = 5.0 ns Propagation Delay

— TTL Compatible Inputs and Outputs

—  Electrically Erasable and Reprogrammable

—  Non-Volatile

—  100% Tested at Time of Manufacture

—  Unused Product Term Shutdown Saves Power

• IN-SYSTEM PROGRAMMABLE

—  In-System Programmable (ISP™) 5V Only

—  Increased Manufacturing Yields, Reduced Time-to Market and Improved Product Quality

—  Reprogram Soldered Devices for Faster Prototyping

• OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS

— Complete Programmable Device Can Combine Glue Logic and Structured Designs

—  Enhanced Pin Locking Capability

— Three Dedicated Clock Input Pins

— Synchronous and Asynchronous Clocks

—  Programmable Output Slew Rate Control to Minimize Switching Noise

—  Flexible Pin Placement

— Optimized Global Routing Pool Provides Global Interconnectivity

—  Lead-Free Package Options

Product Photos

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